Design a 3-to-8 line decoder using AND gates. Provide the truth table and logic expression for the decoder's output lines.
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A 3-to-8 line decoder using AND gates has 3 input lines (A, B, C) and 8 output lines (Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7). The truth table for the decoder is as follows:
| A | B | C | Y0 | Y1 | Y2 | Y3 | Y4 | Y5 | Y6 | Y7 |
|---|---|---|----|----|----|----|----|----|----|----|
| 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
The logic expression for the decoder's output lines can be written as:
Y0 = A' * B' * C'
Y1 = A' * B' * C
Y2 = A' * B * C'
Y3 = A' * B * C
Y4 = A * B' * C'
Y5 = A * B' * C
Y6 = A * B * C'
Y7 = A * B * C
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